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Analog IC co-design for latch-up compliance - EDN Asia
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EEVblog #16 - CMOS SCR Latchup Tutorial - YouTube
Earlier Is Better In Latch-Up Detection
[SOLVED] - How to use SCR as a Latch? | Forum for Electronics
Latch-Up Problem in CMOS – VLSI Design – Buzztech
Figure 1 from High Holding Current SCRs (HHI-SCR) for ESD protection
PPT - Latch-UP PowerPoint Presentation, free download - ID:5779057
Latch-up issue in CMOS Logic | Latch-up effect in VLSI - Team VLSI
Analog IC co-design for latch-up compliance - EDN Asia